This invention relates generally to measuring clock frequency and more specifically to an auto ranging frequency measurement circuit that provides improved accuracy with a reduced number of logic gates.
Serial lines provide a point-to-point communication path between different pieces of digital equipment. Clock signals for the point-to-point connection are generated from one end of the serial line and then transmitted to the opposite end of the serial line. For example, data terminal equipment (DTE), such as a computer, is connected by a RS-232 or V.35 serial line to data communication equipment (DCE), such as a modem. Clock signals are generated by the modem and then transmitted over the RS-232 line to the computer. The computer must be initialized with the correct frequency of the clock line in order to correctly transfer data over the serial line.
In asynchronous serial lines, the clock and data signals are multiplexed together on a common channel. Equipment connected to opposite ends of the asynchronous serial line operate according to standardized line frequencies. Synchronous serial lines have separate clock and data lines and are often used with network routers to route data at higher baud rates than what is typically possible with asynchronous serial lines. In synchronous serial lines, the clock rate is set dynamically by the DCE. For example, the DCE might set the clock rate at 56 kiloHertz, 1.5 megaHertz, 2.0 megaHertz, 45 megaHertz or 52 megaHertz.
A device, such as a router, must be manually programmed with each clock frequency transmitted by each DCE. If the wrong clock frequencies are loaded into the router, data might not be routed efficiently over the different network lines. For example, the router might choose a line for routing data that has a slower line frequency than what is actually available on another line identified with the wrong frequency.
Frequency measurement circuits typically take multiple samples for one or two periods of a clock signal. The position of clock transitions, within the multiple samples, is used to determine the frequency of the clock signal. The sample frequency has to be relatively high compared to the measured clock frequency. Further, the sample frequencies must have a large dynamic range in order to effectively measure a wide range of frequencies. The circuitry used for generating high sampling frequencies is, therefore, complex and often requires sensitive discrete components.
In some serial lines, the clock signal is disabled when data is not currently being transferred. For example, some protocols do not transmit the clock signal during packet framing. This is referred to as clock gapping. Thus, the effective data transmission rate over the serial line does not correspond with the measured serial line frequency based upon an isolated measurement period.
Accordingly, a need remains for a simple frequency measurement circuit with improved accuracy and increased dynamic range.